VERIFUL : VERI cation using FUnctional Learning
نویسندگان
چکیده
It is well known that learning (i.e., indirect implications) based techniques perform very well in many instances of combinational circuit veri cation when the two circuits being veri ed have many corresponding internal equivalent points. We present some results on combinational circuit design veri cation using a powerful, and highly general learning technique called functional learning. Functional learning is based on OBDDs and hence can e ciently learn novel implications based on functional manipulation.
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